Track and hold circuit with operating point sensitive current mode based offset compensation
US7218154B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2005 |
| Grant date | May 15, 2007 |
| Priority date | — |
| Expiry date | Dec 9, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C27/026
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A track and hold (or sample and hold) offset compensated amplifier circuit that performs offset compensation in response to a comparison of sign (or sign and value) of the current forced to the output terminal of operational amplifier in order to keep it at the potential of holding capacitor during the holding phase. Based on this comparison, the comparison circuit increases or decreases the voltage differential applied between the positive and negative input terminals of the operational amplifier depending on whether the comparison circuit detects that the current forced to the output terminal of the operational amplifier is positive or negative. During the holding phase, negative feedback is disconnected, and the positive and negative input terminals of the operational amplifier are connected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.