Semiconductor integrated circuit
US7218160B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 20, 2004 |
| Grant date | May 15, 2007 |
| Priority date | — |
| Expiry date | Sep 23, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/356173
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit according to the present invention comprises a latch circuit, a retaining circuit, and a feedback circuit, wherein the latch circuit inputs therein an input data signal, a clock signal and a feedback signal and outputs an output data signal, the retaining circuit retains the output data signal, and the feedback circuit inputs therein the input data signal and the output data signal to thereby generate the feedback signal based on logic combinations of the input data signal and the output data signal, and an internal operation of the latch circuit is turned on/off by means of the feedback signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.