Hot-carrier reliability design rule checker
US7219045B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2001 |
| Grant date | May 15, 2007 |
| Priority date | — |
| Expiry date | Dec 16, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is directed to methods for reliability simulations in aged circuits whose operation has been degraded through hot-carrier or other effects by allowing design rules on degradation to be included in the netlist. Once the hot-carrier circuit simulation is launched, the rules are checked and the reliability design rule violations are reported. The process can be performed on either the layout or schematic window. The design rule criteria can be any device parameter and can be expressed in absolute or relative terms. The criteria can be based on device type, model card name, instance geometry, or temperature. Additionally, values can be set prior to beginning the simulation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.