Dual use modular PCI/PCI express interface
US7219181B2 · kind B2 · utility
21Cited by
3References
9Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 3, 2005 |
| Grant date | May 15, 2007 |
| Priority date | — |
| Expiry date | Jun 4, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4221
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques where PCIe is implemented using connectors that are compatable with Cardbus/MPCI connectors. One technique implements PCIe on unused pins on Cardbus/MPCI connectors. An advantage of this implementation is that it provides a single, smaller connection point than utilizing separate connectors. Another technique is to add additional pins to a PCI connector for processing PCIe low voltage differential signal pairs. Although this technique is not as small as the first technique, it is still smaller than utilizing separate connectors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.