FIFO control circuit
US7219193B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 19, 2004 |
| Grant date | May 15, 2007 |
| Priority date | — |
| Expiry date | Nov 30, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2205/108
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A FIFO control circuit for passing receive data and transmit data in a first-in first-out system, respectively, is provided. The FIFO control circuit comprises a receiving circuit; a transmitting circuit; a FIFO buffer for temporarily storing receive data received by the receiving circuit and transmit data to be transmitted by the transmitting circuit; a free space management circuit for managing free space of the FIFO buffer; a first address storage unit for storing an address range in which the receive data is stored in the FIFO buffer; a second address storage unit for storing an address range in which the transmit data is stored in the FIFO buffer; a write pointer control circuit writing the receive data and the transmit data; and a read pointer control circuit reading out the receive data and the transmit data from the FIFO buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.