Method for managing virtual and actual performance states of logical processors in a multithreaded processor using system management mode
US7219241B2 · kind B2 · utility
28Cited by
23References
10Claims
0Family size
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Key dates
| Filing date | Nov 30, 2002 |
| Grant date | May 15, 2007 |
| Priority date | — |
| Expiry date | Dec 16, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A power management technique uses system management interrupt (SMI) to manage performance states of logical processors in a physical processor. Each logical processor is associated with a virtual performance state and an actual performance state. A request to retrieve or to change the virtual performance state causes the SMI to be generated. The virtual performance state is a state known to an operating system (OS). The actual performance state is a state that the logical processor is operating at.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.