Direct instructions rendering emulation computer technique
US7219337B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 6, 2003 |
| Grant date | May 15, 2007 |
| Priority date | — |
| Expiry date | Sep 27, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/45554
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for emulating instructions of legacy microprocessors which execute a compiled high-ordered language, such as C/C++, in which the compiled code is structured such that data and instructions segments are segregated. In order to improve the real-time performance of the system, legacy instructions are directly mapped to equivalent instructions of the host processor where possible. Additional techniques may optionally be employed to further increase the real-time performance of the system. By utilizing the direct mapping of the legacy instructions to host instructions, the emulation system in accordance with the present invention provides increased real-time performance for relatively modern RISC microprocessors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.