Programmable hysteresis for boundary-scan testing
US7222278B2 · kind B2 · utility
4Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2003 |
| Grant date | May 22, 2007 |
| Priority date | — |
| Expiry date | Nov 24, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318572
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Disclosed is a Boundary-Scan test receiver for capturing signals during board interconnect testing. The test receiver has a comparator with a first input to receive signals during board interconnect testing, and a second input to receive a reference voltage. A programmable hysteresis circuit is coupled to at least one of the comparator's inputs. The programmable hysteresis circuit may be configured to program a hysteresis voltage and/or a hysteresis delay, both of which help prevent the comparator from integrating signal noise.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.