Patent · US Expired

Flip-flop implemented with metal-oxide semiconductors using a single low-voltage power supply and control method thereof

US7224197B2 · kind B2 · utility

1Cited by
5References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 26, 2005
Grant dateMay 29, 2007
Priority date
Expiry dateDec 9, 2025

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K3/35625
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

The present invention discloses a flip-flop implemented with metal-oxide semiconductors using a single low-voltage power supply and a control method thereof, wherein an external control signal is input to a power switch in order to turn on the power switch for an active mode or to turn off the power switch for a sleep mode and inputting an external sleep control signal; the power switch is used to control a combinational circuit to enter into the active or the sleep mode, and the combinational circuit is connected to a virtual power supply; an internal clock signal is separately input to a master stage and a slave stage of the flip-flop, and whether to enter into the sleep mode or the active mode is determined by the voltage level of the internal clock signal. In the present invention, all the logic gates of the combinational circuit are formed of low-threshold CMOS's, which enables the present invention to maintain a given operation speed at a lower voltage. The flip-flop of the present invention is formed of both low-threshold and high-threshold elements, whereby not only the operation speed can be maintained but also the leakage current can be suppressed spontaneously, and furth…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.