Apparatus and method for improving drive-strength and leakage of deep submicron MOS transistors
US7224205B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 4, 2005 |
| Grant date | May 29, 2007 |
| Priority date | — |
| Expiry date | Jun 10, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for manufacturing metal-oxide semiconductor (MOS) transistors that are operable at voltages below 1.5V, which MOS transistors are area efficient, and where the drive strength and leakage current of the MOS transistors is improved. The invention uses a dynamic threshold voltage control scheme that does not require a change to the existing MOS technology process. The invention provides a technique that controls the threshold voltage of the transistor. In the OFF state, the threshold voltage of the transistor is set high, keeping the transistor leakage to a small value. In the ON state, the threshold voltage is set to a low value, resulting in increased drive strength. The invention is particularly useful in MOS technology for both bulk and silicon on insulator (SOI) CMOS.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.