Latch-type sense amplifier
US7227798B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 6, 2003 |
| Grant date | Jun 5, 2007 |
| Priority date | — |
| Expiry date | Dec 4, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/065
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An improved latch-type sense amplifier circuit having two cross-coupled inverters forming a latch, a supply coupling device for selectively connecting the latch to a supply source, and a bit line coupling circuits for selectively connecting the inputs of each inverter to the complimentary bit line from the memory array. The circuit is configured to sense a voltage difference between the bit lines with improved reliability by providing a delayed sense amplifier enable signal to pass transistors for delaying disconnection of the bit lines from the sense amplifier until the latching action is completed, and adding two transistors in series with the existing transistors of the conventional latch for correcting the offset between the threshold voltages of the inverters of the latch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.