DC offset reduction in radio-frequency apparatus and associated methods

US7228109B2 · kind B2 · utility

Assignee

• Silicon Laboratories Inc. · US

Inventors

• Tod Paulus · New York, US
• Donald A. Kerth · Austin, US
• Richard T. Behrens · Louisville, US
• Jeffrey W. Scott · Austin, US
• G. Diwakar Vishakhadatta · Austin, US
• G. Tyson Tuttle · Austin, US
• Vishnu Srinivasan · Austin, US

Key dates

• Filing date: Feb 12, 2002
• Grant date: Jun 5, 2007
• Expiry date: Feb 25, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H04B2215/064
• WIPO field: Telecommunications
• WIPO sector: Electrical engineering

Abstract

A radio-frequency receiver circuitry includes a down-converter circuitry, an analog-to-digital converter circuitry, and a DC offset reduction circuitry. The down-converter circuitry accepts a received radio-frequency signal and processes the radio-frequency signal to provide an in-phase down-converted signal and a quadrature down-converted signal to the analog-to-digital converter circuitry. The analog-to-digital converter circuitry converts the in-phase and quadrature down-converted signals to an in-phase digital output signal and a quadrature digital output signal, respectively. The DC offset reduction circuitry couples to the analog-to-digital converter circuitry, and tends to reduce a DC offset transmitted to the in-phase and quadrature digital output signals.