Predicate register file write by an instruction with a pending instruction having data dependency
US7228402B2 · kind B2 · utility
15Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 2, 2002 |
| Grant date | Jun 5, 2007 |
| Priority date | — |
| Expiry date | Mar 26, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/384
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method to handle data dependencies in a pipelined computer system is disclosed. The method includes allocating a plurality of registers, enabling execution of computer instructions concurrently by using the plurality of registers, and tracking and reducing data dependencies in the computer instructions by correlating a busy condition of a computer instruction to each register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.