Method of forming an integrated circuit incorporating higher voltage devices and low voltage devices therein
US7229886B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2004 |
| Grant date | Jun 12, 2007 |
| Priority date | — |
| Expiry date | Aug 23, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0191
Abstract
A method of forming an integrated circuit configured to accommodate higher voltage and low voltage devices. In one embodiment, the method of forming the integrated circuit includes forming a switch on a semiconductor substrate, and forming a driver switch of a driver embodied in a transistor. The method of forming the transistor includes forming a gate over the semiconductor substrate. The method of forming the transistor also includes forming a source/drain by forming a lightly doped region adjacent a channel region recessed into the semiconductor substrate, and forming a heavily doped region adjacent the lightly doped region. The method of forming the transistor further includes forming an oppositely doped well under and within the channel region. The method of forming the transistor still further includes forming a doped region with a doping concentration profile less than the heavily doped region between the heavily doped region and the oppositely doped well.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.