Capacitor placement for integrated circuit packages
US7230317B2 · kind B2 · utility
7Cited by
7References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2004 |
| Grant date | Jun 12, 2007 |
| Priority date | — |
| Expiry date | Feb 18, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A side-mounted capacitor for a semiconductor die package is described. In one embodiment, a substrate has a die side to which an IC (integrated circuit) may be attached, and an edge adjacent the die side. A bypass capacitor is attached to the package substrate edge.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.