Multiple time-base clock for processing multiple satellite signals
US7230987B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2003 |
| Grant date | Jun 12, 2007 |
| Priority date | — |
| Expiry date | Aug 10, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N21/6143
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An integrated receiver with multiple, independently synchronized clock signals for multiple channel transport stream decoding and delivery substantially implemented on a single CMOS integrated circuit is described. An integrated circuit that services two satellite programs must generate and distribute corresponding time domain clocks to the various components of the integrated circuit. The transport block that receives one or more satellite signals from a demodulating block will extract program clock recover values from each signal being decoded and use these values to produce an error signal or control word that serves as an input to a clock generator. Based upon this input, the clock circuit will produce a corresponding time domain clock for each channel serviced by the integrated circuit. The output of the clock circuit is distributed to the various processing blocks within the integrated circuit that operate upon channel content received and processed by the transport block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.