Method and apparatus for performing input/output floor planning on an integrated circuit design
US7231335B2 · kind B2 · utility
1Cited by
7References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 26, 2003 |
| Grant date | Jun 12, 2007 |
| Priority date | — |
| Expiry date | Nov 15, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2113/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for performing input/output (I/O) floor planning on an integrated circuit design is disclosed. User design data related to I/O circuit associated with each package pin is initially collected. The collected user design data is then sorted according to operating conditions. Next, an I/O behavioral model and a package model are chosen based on the sorted data. A simulation deck is dynamically built with appropriate operating conditions. Finally, a simulation is performed through a circuit simulator using the chosen I/O behavioral model and the operating conditions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.