Method and apparatus for providing an inter integrated circuit interface with an expanded address range and efficient priority-based data throughput
US7231467B2 · kind B2 · utility
7Cited by
20References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 17, 2003 |
| Grant date | Jun 12, 2007 |
| Priority date | — |
| Expiry date | Jun 9, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/423
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus implementing an enhanced protocol between an I2C master and an I2C slave. In various embodiments the invention permits greater addressability space and high priority access to the slave device. The enhanced protocol is implemented by the addition of command code data being transmitted which is recognized through an interface circuit inside the slave device. The invention provides an I2C solution for accessing high priority address space with one command byte, medium priority space with two command bytes and low priority space with three command bytes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.