Extended register bank allocation based on status mask bits set by allocation instruction for respective code block
US7231509B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 13, 2005 |
| Grant date | Jun 12, 2007 |
| Priority date | — |
| Expiry date | Aug 5, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3858
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An extended register processor includes a register file having a legacy register set and an extended register set. The extended register set includes a plurality of extended registers accessible only to extended register instructions. The processor maps extended register references to physical extended registers at run time. The processor includes a configurable extended register mapping unit to support this functionality. The mapping unit is accessible to an instruction decoder, which detects extended register references and forwards them to the mapping unit. The mapping unit returns a physical extended register corresponding to the extended register reference in the instruction. The mapping unit is configurable so that, for example, the mapping is specific to a code block. An extended register allocation instruction causes the processor to allocate a portion of the extended register set to the code block in which the declaration is located and to configure the mapping unit to reflect the allocation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.