Offset cancellation in a multi-level signaling system
US7233164B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 23, 2004 |
| Grant date | Jun 19, 2007 |
| Priority date | — |
| Expiry date | Aug 6, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/4906
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A receive circuit having a sampling circuit and a threshold generating circuit. The sampling circuit generates a first sample value having either a first state or a second state according whether an incoming signal exceeds a first threshold level, the first threshold level corresponding to a first threshold value. The threshold generating circuit combines a first control value and a second control value to generate the first threshold value and provides the first threshold value to the sampling circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.