JFET driver circuit and JFET driving method
US7233191B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 13, 2005 |
| Grant date | Jun 19, 2007 |
| Priority date | — |
| Expiry date | Nov 29, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/063
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
To turn on a JFET, a two-stage turn-on current control is employed in a JFET driver circuit and a JFET driving method, by which a shortly pulsed high sourcing current is provided to turn on the JFET rapidly and efficiently, and a continuous low sourcing current is provided after the JFET turns on for reducing the power dissipation. After the JFET turns off, a negative charge pump is also employed to promise the JFET at a turn-off state. A special power sequence is further employed to ensure the JFET could be turned off during the power supply coupled to the JFET starts up.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.