Processor registers having state information
US7234044B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 3, 2003 |
| Grant date | Jun 19, 2007 |
| Priority date | — |
| Expiry date | Jan 25, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3867
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus are provided for implementing an efficient processor having state information included in each register. A processor has registers configured to hold both data and state information, such as carry and overflow information. State information and data can be read and written in the same operation. Holding state information along with data in the same register can provide a variety of benefits, particularly in the context of multithreaded programmable chips.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.