Methods for designing and tuning one or more packaged integrated circuits
US7234232B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2005 |
| Grant date | Jun 26, 2007 |
| Priority date | — |
| Expiry date | Dec 22, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49798
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for producing and tuning a packaged integrated circuit a) incorporates into a packaged integrated circuit design, at least one tunable circuit feature; b) fabricates a packaged integrated circuit in accordance with said packaged integrated circuit design; c) identifies a trimming point on the tunable circuit feature of said packaged integrated circuit, using an x-ray inspection system; d) relates coordinates of the trimming point to coordinates of a visible reference marker; e) utilizes the relationship between the visible reference marker and the trimming point to position a cutting tool over the trimming point; and f) utilizes the cutting tool to make one or more cuts into the packaged integrated circuit, until the tunable circuit feature has been acceptably modified at the trimming point.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.