Increasing the dynamic range of CMOS photodiode imagers
US7235771B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2005 |
| Grant date | Jun 26, 2007 |
| Priority date | — |
| Expiry date | Dec 23, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/78
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A multiple-step reset process and circuit for resetting a voltage stored on a photodiode of an imaging device. A first stage of the reset occurs while a source and a drain of a pixel source-follower transistor are held at ground potential and the photodiode and a gate of the pixel source-follower transistor are charged to an initial reset voltage having potential less that of a supply voltage. A second stage of the reset occurs after the initial reset voltage is stored on the photodiode and the gate of the pixel source-follower transistor and the source and drain voltages of the pixel source-follower transistor are released from ground potential thereby allowing the source and drain voltages of the pixel source-follower transistor to assume ordinary values above ground potential and resulting in a capacitive feed-through effect that increases the voltage on the photodiode to a value greater than the initial reset voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.