ESD protection structure with SiGe BJT devices
US7235846B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 27, 2005 |
| Grant date | Jun 26, 2007 |
| Priority date | — |
| Expiry date | Oct 22, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
Abstract
The present invention provides an ESD protection device or structure that exploits the high conductivity of a heavily doped heterojunction base of a standard SiGe bipolar junction transistor (BJT) cell. This improved ESD protection scheme further uses the combination of trench isolation and buried subcollector layer of the SiGe BJT to confine ESD current, minimizing parasitic substrate leakage and achieving large forward voltages while imposing minimal parasitic capacitive loads on a protected active device. Since the ESD protection structure is formed from conventional SiGe BJT transistor cells through modification of the contact metallization, it can be fabricated in an available SiGe BiCMOS fabrication process without additional processing steps, and characterization data already available for the SiGe BJTs can be used to model the performance of the ESD protection devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.