Method and apparatus for generating multiphase clocks
US7236040B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 3, 2004 |
| Grant date | Jun 26, 2007 |
| Priority date | — |
| Expiry date | Dec 3, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multiphase clock generating circuit includes a multiphase clock generator that produces a plurality of multiphase output signals at a first frequency and a multiphase divider with delayed reset control. The multiphase divider with delayed reset control is operatively coupled to receive the plurality of multiphase output signals at the first frequency and further operative to produce a plurality of multiphase output signals at a second frequency based on reset control information. As a result, an interface can be supplied with and switch between multiphase clock at different frequencies within a short amount of time with reduced power consumption and circuit area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.