System and method for dithering with reduced memory
US7236269B2 · kind B2 · utility
3Cited by
2References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 5, 2002 |
| Grant date | Jun 26, 2007 |
| Priority date | — |
| Expiry date | Jul 2, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G3/2059
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A dithering system yielding two-dimensional dither functioning is implemented without line memories. For each primary input color, a feedback loop outputs an color input signal plus error that can be preset to different values. The desired result is that vertical artifacts on a display formed from the output signals are relocated to different locations on consecutive display lines. If signal magnitude from the feedback loop output exceeds the magnitude of the video system creating the display, signal magnitude is preset to a value representing error at the start of the display line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.