Recording and reproducing apparatus, signal decoding circuit, error correction method and iterative decoder
US7237173B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 3, 2002 |
| Grant date | Jun 26, 2007 |
| Priority date | — |
| Expiry date | Jan 17, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/373
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A recording and reproducing apparatus having an ECC-less error correction function, includes an erasure detector generating an erasure flag indicating erasure of a read signal; and an iterative decoder having two soft-in/soft-out (SISO) decoders, i.e., an inner decoder and an outer decoder, and correcting the erasure by inputting the erasure flag ek into the inner decoder and performing erasure compensation in the inner decoder. As the erasure compensation in the inner decoder, channel information is masked while the erasure flag is on. The erasure of data due to a media defect is detected inside the iterative decoder, and the second erasure flag is inputted into the inner decoder to perform erasure compensation in the inner decoder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.