LED array package structure and method thereof
US7239333B2 · kind B2 · utility
1Cited by
1References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 21, 2005 |
| Grant date | Jul 3, 2007 |
| Priority date | — |
| Expiry date | Sep 22, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldTextile and paper machines
- WIPO sectorMechanical engineering
Abstract
According to the method, a trench structure is formed in a substrate. LED arrays and driver ICs are located in the corresponding trenches. An insulating layer is formed over the substrate, the LED arrays and the driver ICs. A photolithography process forms an electrical connection structure between the LED arrays and the driver ICs. Then, a die-cutting process cuts out individual units. These units are fixed in a PCB and an electrical connection structure is formed between these units and input/output pins on the PCB.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.