Random access interface in a serial memory device
US7240146B2 · kind B2 · utility
0Cited by
8References
20Claims
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Key dates
| Filing date | May 1, 2006 |
| Grant date | Jul 3, 2007 |
| Priority date | — |
| Expiry date | May 1, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A random access interface is provided to a non-volatile, serial memory array. An address multiplexer has an external address connection and a serial address connection. The external address may be of a non-sequential nature, depending on the accessing instruction. Boot data is loaded from the first row of the memory array to a cache register. If a random access mode is enabled during a boot operation, the external address is applied to a data multiplexer that accesses the boot data from the cache register and executes the instructions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.