Method and apparatus for dynamic power management in a processor system
US7240223B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 7, 2003 |
| Grant date | Jul 3, 2007 |
| Priority date | — |
| Expiry date | Jul 27, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dynamic power management system includes an operating system (OS) that causes a processor to operate in one of multiple run states that have different performance and/or power dissipation levels. The OS selects the run state in response to processor information (e.g., processor load) being monitored by the OS. The OS can predict future states of the processor information based on sampled processor information. The OS can take an average of the predicted and actual samples for comparison with a threshold to select a run state. The OS can track the number of consecutive saturated samples that occur during a selected window of samples. The OS can predict future processor information samples based on the number of consecutive saturated samples.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.