Systems and methods for preserving the order of data
US7240347B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 2, 2001 |
| Grant date | Jul 3, 2007 |
| Priority date | — |
| Expiry date | Jul 2, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/9094
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A device includes an input processing unit and an output processing unit. The input processing unit dispatches first data to one of a group of processing engines, records an identity of the one processing engine in a location in a first memory, reserves one or more corresponding locations in a second memory, causes the first data to be processed by the one processing engine, and stores the processed first data in one of the locations in the second memory. The output processing unit receives second data, assigns an entry address corresponding to a location in an output memory to the second data, transfers the second data and the entry address to one of a group of second processing engines, causes the second data to be processed by the second processing engine, and stores the processed second data to the location in the output memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.