Reference circuit
US7242241B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 2003 |
| Grant date | Jul 10, 2007 |
| Priority date | — |
| Expiry date | Jun 15, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/262
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A reference circuit comprising first and second field effect transistors connected to form a first current mirror, and third and fourth field effect transistors connected to form a second current mirror, wherein a property of the first transistor is mismatched relative to the second transistor such that the threshold voltage of the first transistor is significantly higher than the threshold voltage of the second transistor, and the drain current versus gate-source voltage responses of the first and second transistors have substantially different gradients for current levels at which the reference circuit is operated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.