Non-volatile semiconductor memory device
US7242615B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 28, 2005 |
| Grant date | Jul 10, 2007 |
| Priority date | — |
| Expiry date | Sep 30, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile semiconductor memory device includes: a memory cell array with electrically rewritable and non-volatile memory cells arranged therein; a data hold circuit configured to hold read data or write data of the memory cell array; a data bit detection circuit so connected to the data hold circuit as to detect a bit number of “0” or “1” in data held therein; and an internal control circuit, which serves for controlling data write, erase and read, and includes a data bit register for storing the bit number detected by the data bit detection circuit, the internal control circuit serving to output the bit number stored in said data bit register to external terminals in response to a command input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.