Apparatus and method for verifying glitch-free operation of a multiplexer
US7245161B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2005 |
| Grant date | Jul 17, 2007 |
| Priority date | — |
| Expiry date | Sep 15, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31725
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An apparatus and method for verifying glitch-free operation of a multiplexer are provided. The apparatus includes a circuit having a plurality of flip-flop elements that receive as inputs the plurality of clock signals that are inputs to the multiplexer, and a corresponding synchronized output signal of a decoder generated based on control inputs to the decoder. The synchronized output signals from the decoder are used as trigger signals to the plurality of flip-flops. The flip-flops sample the clock signals based upon the trigger signals and provide outputs to a logic gate. The logic gate operates on the outputs from the flip-flops to generate an output signal indicative of whether glitch-free operation is verified or is not verified.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.