Array substrate for liquid crystal display device having conductive patterns and fabricating method thereof
US7245342B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 9, 2002 |
| Grant date | Jul 17, 2007 |
| Priority date | — |
| Expiry date | Dec 9, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/136286
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate for a liquid crystal display device includes a gate line on a substrate having a display region and a non-display region, wherein the non-display region is about a periphery of the display region and the gate line includes a gate pad disposed in the non-display region at one end of the gate line, a data line crossing the gate line, wherein the data line includes a data pad disposed in the non-display region at one end of the data line, a thin film transistor connected to the gate line and the data line, a passivation layer over the gate line and the data line, a pixel electrode on the passivation layer in the display region, a first conductive pattern on the passivation layer in the non-display region and an orientation film on the first conductive pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.