Runtime parameter mapping for system simulation
US7246056B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 26, 2003 |
| Grant date | Jul 17, 2007 |
| Priority date | — |
| Expiry date | Jun 22, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic device and method are provided to enable simulation of a system while minimizing a requirement to reanalyze or recompile topology information during subsequent simulations of the system. Instructions representative of compiling a topology of the system and at least one relationship among a plurality of parameters of the system may be obtained. The instructions, including reading a data structure containing the plurality of parameters to create an intermediate representation representative of the system and the plurality of parameters may be executed. In some implementations, time and effort required to perform system simulations can be reduced, even when parameters that represent the system are changed during each execution of the simulation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.