Memory device controls delay time of data input buffer in response to delay control information based on a position of a memory device received from memory controller
US7246250B2 · kind B2 · utility
8Cited by
19References
35Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2001 |
| Grant date | Jul 17, 2007 |
| Priority date | — |
| Expiry date | May 8, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1084
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit memory system includes one or more memory modules in which at least one of the memory modules is responsive to a control signal and has delay control information stored thereon. The memory system further includes a memory controller that is configured to generate the control signal in response to the delay control information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.