Logic analyzer having a disassembler employing symbol table information for identifying op-codes
US7246267B2 · kind B2 · utility
2Cited by
18References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2002 |
| Grant date | Jul 17, 2007 |
| Priority date | — |
| Expiry date | Apr 25, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/53
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A logic analyzer according to the subject invention includes a disassembler for disassembling object code. The disassembler automates the process of locating op-code addresses by utilizing information derived from an object file corresponding to the code whose execution is being disassembled. The object file includes addresses for the starting location of op-codes corresponding to individual source code lines. When the disassembler cannot determine the correct starting location for an op-code, it uses information from the object file to obtain the address of an op-code within a specified range of interest.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.