Method for optimizing integrated circuit device design and service
US7246331B2 · kind B2 · utility
16Cited by
3References
21Claims
0Family size
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Inventor
Key dates
| Filing date | Oct 15, 2004 |
| Grant date | Jul 17, 2007 |
| Priority date | — |
| Expiry date | Jul 14, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Improved analysis and refinement of integrated circuit device design and other programs is facilitated by methods in which an original program is partitioned into subprograms representing valid computational paths; each subprogram is refined when cyclic dependencies are found to exist between the variables; computational paths whose over-approximated reachable states are found to be contained in another computational path are merged; and finally, the remaining subprograms conjoined decision conditions become candidates for hints for program refinement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.