Methods, systems and media for functional simulation of noise and distortion on an I/O bus
US7246332B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 8, 2005 |
| Grant date | Jul 17, 2007 |
| Priority date | — |
| Expiry date | Sep 16, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, systems, and media for functional simulation of an I/O bus are disclosed. More particularly, a method of simulating distortion and noise parameters of an I/O bus is disclosed. Embodiments include constraining one or more fields of a record and determining delay amounts based on the resulting parameters, where the final delay amount includes a delay buffer and a net of delay amounts associated with the parameters. Embodiments may also include determining a value of a next bit to be sent to the I/O bus and, after waiting the delay amount, driving the bit on the bus to the next bit value. Parameters may include skew, jitter, duty cycle distortion, voltage reference distortion, and drift of any of these parameters. Further embodiments may include signaling the end of a phase in response to a phase done condition being satisfied.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.