Booting from a re-programmable memory on an unconfigured bus
US7249253B2 · kind B2 · utility
2Cited by
3References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2003 |
| Grant date | Jul 24, 2007 |
| Priority date | — |
| Expiry date | Jul 23, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4403
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Boot up instructions may be stored on a memory coupled to the peripheral component interconnect (PCI) bus. These instructions may be accessed, despite the fact that peripheral component interconnect devices are normally not active during the boot up sequence. As a result, both the basic input/output system and other information may be stored on a reprogrammable memory coupled to the PCI bus. In some embodiments, this may reduce costs by avoiding the need for two semiconductor memories, one on the PCI bus and the other on a legacy bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.