Threshold scaling circuit that minimizes leakage current
US7250807B1 · kind B1 · utility
14Cited by
5References
29Claims
0Family size
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Inventor
Key dates
| Filing date | Jun 5, 2003 |
| Grant date | Jul 31, 2007 |
| Priority date | — |
| Expiry date | Jun 5, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2217/0018
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
The leakage current output by a MOS transistor is minimized by varying a back bias voltage across a range of voltages, and detecting the back bias voltage within the range that minimizes the leakage current output by the MOS transistor. The detected back bias voltage is then applied to the MOS transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.