Semiconductor memory and system apparatus
US7251171B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2005 |
| Grant date | Jul 31, 2007 |
| Priority date | — |
| Expiry date | Oct 6, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0407
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A register part of a mode register has a plurality of operation setting parts in which plural types of operating specifications are respectively set to operate the semiconductor memory. The mode register outputs a soft reset signal when at least a value of one-bit of the register part represents a reset state. A reset signal generator outputs a reset signal for resetting an internal circuit in response to the soft reset signal. In the present invention, a system that controls the semiconductor memory is required to necessarily assign a predetermined bit with a setting command of the mode register in order to generate the soft reset signal. Accordingly, it is possible to reliably reset the internal circuit by external control.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.