Multi-port memory utilizing an array of single-port memory cells
US7251186B1 · kind B1 · utility
9Cited by
18References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2005 |
| Grant date | Jul 31, 2007 |
| Priority date | — |
| Expiry date | Aug 4, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1075
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-port memory device with an array of single-port memory cells is disclosed. According to one embodiment of the invention, the multi-port memory device has N number of memory ports, and is capable of performing any combination of N number of read/write operations during a single cycle of an externally generated core clock signal, without the need of any other externally generated clocking signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.