Low distortion amplifier
US7253689B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 8, 2005 |
| Grant date | Aug 7, 2007 |
| Priority date | — |
| Expiry date | Sep 9, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/3435
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A low distortion amplifier. The novel amplifier includes a first transistor Q1 having first and second output terminals and an input terminal adapted to receive an input signal, and a second transistor Q2 having first and second output terminals and an input terminal adapted to receive a signal from the first output terminal of Q1, wherein the second output terminal of Q1 is connected to the second output terminal of Q2 in order to eliminate a nonlinear current component in Q2. In an illustrative embodiment, the amplifier also includes a cascode Darlington pair Q3, Q4 for holding the second output terminals of Q1 and Q2 at a desired voltage to further reduce distortion and to maintain a wide bandwidth.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.