Estimation circuit for time-interleaved ADC and method thereof
US7253762B2 · kind B2 · utility
29Cited by
7References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2006 |
| Grant date | Aug 7, 2007 |
| Priority date | — |
| Expiry date | Apr 12, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1215
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention provides an apparatus and a method for estimating at least one of timing, gain, and offset errors of a time-interleaved ADC. The apparatus has a first ADC, a second ADC, a converter, an estimator, and a compensator. The converter has a Fourier Transform converter and a calculator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.