Receiver system having analog pre-filter and digital equalizer
US7254198B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 28, 2000 |
| Grant date | Aug 7, 2007 |
| Priority date | — |
| Expiry date | Apr 28, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/03254
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A receiver system suitable for a local area network contains an analog pre-filter (207 or 619), an analog-to-digital converter (210), a digital equalizer (212), and a decoder (605). A symbol-information-carrying input analog signal (yk), or a first intermediate analog signal generated from the input analog signal, is filtered by filtering circuitry in the pre-filter to produce a filtered analog signal (Zs) with reduced intersymbol interference. The filtering circuitry operates according to a transfer function such as (b1s+1)/(a2s2+a1s+1) or (1−Vc)+VcPF(s) where Vc is adaptively varied. The analog-to-digital converter provides analog-to-digital signal conversion. The equalizer provides digital signal equalization to produce an equalized digital signal (a′k) as a stream of equalized digital values. The decoder converts the equalized digital values, or intermediate digital values generated from the equalized digital values, into a stream of symbols.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.