Array substrate for liquid crystal display device and method of manufacturing the same
US7256061B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 27, 2005 |
| Grant date | Aug 14, 2007 |
| Priority date | — |
| Expiry date | Oct 15, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/136236
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate for a liquid crystal display device includes a substrate including a first driving region, a second driving region, and a pixel region, the pixel region including a switching region and a storage region; a first n-type transistor in the first driving region, a second p-type transistor in the second driving region; a third transistor in the switching region, the third transistor including a gate electrode, an active layer, a source electrode, and a drain electrode; an extension portion in the storage region and extending from the active layer; a metal pattern on the extension portion; a storage line over the metal pattern; and a pixel electrode in the pixel region and contacting the third transistor, wherein the metal pattern, the storage line and the pixel electrode form first, second and third electrodes of a storage capacitor that includes a first capacitor and a second capacitor parallel to each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.