Spacers for cells having spaced opposed substrates
US7257007B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 2002 |
| Grant date | Aug 14, 2007 |
| Priority date | — |
| Expiry date | Feb 7, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/141
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
In an active semiconductor backplane for a liquid crystal spatial light modulator, spacers (25) which are distributed over the backplane extend above an array of electrical and/or electronic elements and comprise at least two layers essentially of the same material and occuring in the same order as is found in at least one of the electrical or electronic elements, such as an NMOS transistor (52). The latter is formed from a stack of layers on a silicon substrate (51) comprising polysilicon (56), continuous silicon oxide (57) modified to include gate oxide GOX (55), metallic gate electrode (59), continuous silicon oxide (58) and a metallic drain electrode (60) which is coupled to a spaced mirror electrode over the layer (58). Likewise, spacer (25) comprises the layers (57 and 58) with metallic (67, 68) deposited simultaneously with electrodes (59, 60). The foot of layer (57) is differently modified to include field oxide layer (69) and polysilicon layers thin oxide (71). Spacers (25) are located regularly within the array of transistors (25)/mirrors (65) and also about the array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.